1. Field of the Invention
The present invention relates to a surface mount package. More particularly, the present invention relates to a surface mount package having a high reliability of a junction with a printed circuit board.
2. Description of the Related Art
It is desirable that a semiconductor device is assembled in an electronic device at a high density. In the electronic device having a high density, a surface mount package is often used to install a semiconductor device. As one of the surface mount packages, a ball grid array package (hereafter, referred to as a BGA package) is known.
FIG. 1 is a view showing a structure of a conventional BGA package. The conventional BGA package 100 has a rectangular package body 101. A number of terminals 102 are joined to a rear surface of a package body 101. As shown in FIG. 2, a number of terminals 102 are arranged in the form of a matrix. A solder ball 103 is soldered and joined to each terminal 102. Each solder ball 103 is covered with a solder layer 104. The solder ball 103 functions as a terminal of a BGA package 100 to be connected to a printed circuit board. A semiconductor device 105 is placed in the package body 101.
FIG. 3 shows an electronic device including the above-mentioned conventional BGA package 100 and a printed circuit board 150. The BGA package is assembled to the printed circuit board 150. A pad 107 is mounted on a surface of a substrate 106. The pad 107 and the solder ball 103 of the BGA package 100 are soldered and joined to each other. The soldering is usually carried out through re-flow. That is, the pad 107 and the solder ball 103 are heated in the condition that they are in contact with each other, and the solder layer 104 is melted to join the solder ball 103 and the pad 107. The pad 107 and the ball 103 are joined to each other through a melted solder 104xe2x80x2.
When the BGA package 100 and the printed circuit board 150 are heated, a stress is induced because of a difference between thermal expansion coefficients of the package body 101 and the substrate 106. The induced stress acts on the solder ball 103. The induced stress is concentrated on solder balls 103-1 in the outermost circumference of the matrix, especially, on solder balls 103-2 at four corners. The solder balls 103-2 at the four corners are likely to be stripped from the pad 107 on the substrate 106, and its electrical mechanical reliability is poor.
The same problems are pointed out for a SON (Small Outline Carrier) package and a BCC (Bump Chip Carrier) package in which a land is used instead of the solder ball, as the terminal on the rear surface.
A technique for suppressing the strips of the solder balls 103-2 at the four corners from the pad 107 on the substrate 106 is disclosed in Japanese Laid Open Patent Application (JP-A-Heisei, 9-307022). The known BGA package has a plurality of solder balls arranged in the form of a matrix. Among the solder balls, solder balls positioned in the outermost circumference of the matrix have diameters longer than those of the other solder balls. Thus, a contact area between the solder balls in the outermost circumference and the pad on the substrate is wider to thereby strengthen the adhesion.
However, even if the diameters of the solder balls are longer, the stress acting on the solder balls at the four corners is not reduced.
Another BGA package is disclosed in Japanese Laid Open Patent Application (JP-A-Heisei, 11-17058). The BGA package has a structure for easily testing a semiconductor device mounted thereon. In the BGA package 210, an IC chip 211 is mounted on a surface of a substrate 212, as shown in FIG. 4. The IC chip 211 is connected through a bonding wire 216 to a wiring 213a on the surface of the substrate 212. The wiring 213a is connected through a through hole 214 to a wiring 213b on a rear. A solder bump 215 is connected to the wiring 213b. The wiring 213a is extending up to a side of the substrate 212. An Ni plate layer 219 and an Au plate layer 220 are connected to a portion of the wiring 213a arranged on the side of the substrate 212. The Ni plate 219 and the Au plate layer 220 are electrically connected through the wiring 213a and the bonding wire 216 to an electrode pad 211a on the IC chip 211. Moreover, the solder bump 215 is electrically connected through the wiring 213b, the through hole 214 and the wiring 213a to the electrode pad 211a. The Ni plate layer 219 and the Au plate layer 220 are used as a test pad 218 to be used when the IC chip 211 is tested.
FIG. 5 shows a structure of a socket 240 into which the BGA package 210 is inserted. The socket 240 contains an IC socket body 230, an IC socket contact element 231 and an outer terminal 232. The IC socket contact element 231 is in contact with the test pad 218. The IC socket contact element 231 is electrically connected to the outer terminal 232. The IC chip 211 can be tested by inputting or outputting a signal to or from the outer terminal 232 of the socket 240.
However, the above-mentioned technique is not intended to solve the problem that a stress is applied to the solder bump 215 when the BGA package 210 is installed in a printed circuit board.
Also, other surface mount packages are disclosed in Laid Open Japanese Patent Application (Jp-A-Heisei 5-243453, Jp-A-Heisei 11-54654, and Jp-A-Heisei 11-74637).
An object of the present invention is to reduce a stress acting on a junction between a surface mount package and a printed circuit board provided with the surface mount package, and thereby to improve an electrical mechanical reliability.
Another object of the present invention is to provide a surface mount package and an electronic circuit provided with it in which a stress is not concentrated on a particular terminal provided in the surface mount package.
In order to achieve an aspect of the present invention, a surface mount package is composed of a package body, and first and second terminals. The package body has first and second surfaces intersecting with each other, and has an installing portion for an element to be installed. The first terminal is connected to the first surface, and the second terminal is connected to the second surface.
The second terminal is desirably used for connection to a printed circuit board by a conductive section formed of solder.
Also, the second terminal desirably extends from a first intersection line at which the first and second surfaces intersect, in a direction that is vertical to the first intersection line and parallel to the first surface.
It is also desirable that the second terminal extends from a first intersection line at which the first and second surfaces intersect, in another direction that is vertical to the first intersection line and parallel to the second surface.
The package body may further have a third surface intersecting to the second surface. In this case, the second terminal desirably extends in the direction to reach the second intersection line.
The second terminal desirably extends from the second intersection line in still another direction that is vertical to the second intersection line and parallel to the third surface.
The first surface may be a polygon having sides and an angle between the sides. In this case, the second terminal is desirably arranged in a portion corresponding to the angle.
The second terminal may be electrically connected to the element.
Also, the second terminal may be electrically isolated from the element.
The first terminal may include matrix terminals arranged to form a matrix, and the matrix terminals may include a corner terminal at a corner of the matrix. In this case, the second terminal is desirably close to the corner terminal such that the corner terminal is prevented from being peeled off from a printed circuit board when a stress is acted on a junction between the corner terminal and the printed circuit board.
The element may be a semiconductor device.
The first terminal may include a ball coated with solder.
The first terminal may be a land.
In order to achieve another aspect of the present invention, an electronic device is composed of a surface mount package and a printed circuit board. The surface mount package includes a package body and first and second terminals. The package body has first and second surfaces intersecting with each other, and has an installing portion for an element to be installed. The first terminal is connected to the first surface, and the second terminal is connected to the second surface. The printed circuit board includes a substrate, and third and fourth terminals connected to the substrate. The third terminal is fixed to the first terminal and the fourth terminal is fixed to the second terminal.
The fourth terminal is desirably fixed to the second terminal with a conductive portion formed of solder.
The printed circuit board may further include another element. In this case, the fourth terminal is electrically isolated from the other element.
The fourth terminal may be earth grounded.
In order to achieve still another aspect of the present invention, a method of fabricating an electronic device is composed of
providing a surface mount package including
a package body having first and second surfaces intersecting with each other, and having a installing portion in which an element is to be installed,
a first terminal connected to the first surface, and
a second terminal connected to the second surface;
providing a printed circuit board including:
a substrate, and
third and fourth terminals connected to the substrate;
connecting the first and third terminals; and
connecting the second and fourth terminals.
The connecting second and fourth terminals desirably includes fixing the second and fourth terminals with solder.